NOR and NAND with more than 2 inputs return an incorrect output

probably because the additional inputs are not taken into account correctly.



gamma version: 2021.4.9

Internally, the operators get chained, so the result of the first operator ist the input for the next operation… If you patch it like that, you should get the same results.

This is just how the operator pattern in VL works, and is automatically available for nodes with that pattern.

These nodes might need to be implemented in a different way, if you think that the official definition of logic operations with multiple inputs is different than that.

With the knowledge of the operator pattern, the result of NOR and NAND with more than two inputs becomes understandable.

Here an illustration of how the NAND node works with the operator pattern and how it might work without the operator pattern.

From my very personal point of view, I would expect that the NAND node return FALSE if all inputs are TRUE.

If we extend the basic equation of the NAND operator by one more input, we get the following equation, which returns FALSE if all inputs are TRUE.


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